In March 2026, Elon Musk announced Terafab: a proposed 100-million-square-foot semiconductor campus in Grimes County, Texas, backed by Tesla, SpaceX, and xAI, with Intel as manufacturing partner and a $16.8 billion first phase. By footprint it is fifteen times the Pentagon and five times Boeing’s Everett factory — a scale claim that raises the central question of this hub: can one building reshape the global semiconductor order?
This page works through that question in four layers, matching the series reading order. First, the fundamentals and scale: what Terafab actually is and what the first phase buys. Second, the strategy: how the single-roof build compares with TSMC’s specialised fabs and how to weigh build versus buy. Third, the reality check: how to evaluate feasibility and separate credible signal from negotiating tactic. Fourth, the consequences: space-grade chips, the new fab rivals, and the supply-chain signal for chip buyers.
Every section below answers one question at what/why depth, enough to orient a decision, never enough to replace the detailed treatment, and routes you to the cluster article that carries the full analysis.
In This Series
- Inside Elon Musk’s Terafab Texas Chip Factory and Its One Terawatt Ambition: the what, where, and scale, what the $16.8 billion first phase buys, and why the 1-terawatt target looks extreme.
- Building Versus Buying AI Chips and the Single Roof Fab Bet: the strategic core, how the single-roof model compares with TSMC’s specialised fabs, and how to weigh build versus buy.
- Is Terafab Realistic and Why Leading Edge Chips Cannot Be Licensed: the scepticism layer, feasibility, signal versus tactic, and the 5-plus-year reality of leading-edge process.
- Space Grade Chips the New Fab Rivals and Terafab’s Supply Chain Signal: the synthesis, space-grade chips, new fab rivals, and what Terafab signals for the supply chain.
What is Elon Musk’s Terafab, and what is the $16.8 billion first phase actually paying for?
Terafab is a proposed 100-million-square-foot semiconductor campus in Grimes County, Texas, announced in March 2026 by Tesla, SpaceX, and xAI, with Intel as manufacturing partner. The $16.8 billion first phase covers land, the building shell, cleanrooms, lithography tooling, power and water utilities, and the Intel partnership setup. It does not buy finished chips. Its defining bet is consolidating logic, memory, packaging, and testing under one roof, a deliberate departure from the specialised-fab model.
The confirmed facts are narrower than the headlines. SpaceX is the lead entity named in the Texas agreements, with Tesla and xAI as the other backers, and Intel signed on as manufacturing partner. The site is a decommissioned coal-fired power plant location in Grimes County, near the Gibbons Creek Reservoir, whose water the companies plan to draw for industrial use rather than local groundwater.
One detail worth treating with care: the process node is still unresolved across sources. Some reports point to Intel’s 18A node, others to the next-generation 14A, and at least one claims a 2nm target. When the loudest number keeps shifting, that is a prompt to check primary sources rather than repeat it.
What the first phase does not cover is output: a finished, yielding fab takes years beyond the initial spend. Texas has tied public support to the project through the JETI program and a $30 million Texas Enterprise Fund grant extended to SpaceX, both attached to job and investment milestones rather than unconditional cash.
Site selection matters too. Grimes County has roughly 30,000 residents, so the project would drop a large factory into a small county, and the county judge has already called it “a generational change for Grimes County”. The full site and incentive story, and Intel’s precise role, sit in the first article.
Start with the full Terafab overview
How big is Terafab really, and why does “biggest factory on Earth” deserve scrutiny?
Terafab’s 100-million-square-foot footprint is roughly fifteen times the Pentagon and five times Boeing’s Everett factory. But enclosed area is not the same as wafer capacity; the meaningful metrics are cleanroom area, wafer starts per month, and yield ramp. A larger shell does not automatically produce more chips, so treat the “biggest factory” claim as a scale signal to verify against tooling and output milestones rather than proof of capacity.
The single roof integrates logic, memory, advanced packaging, and testing. But “biggest building” is an attention metric, while “most chips” is a capability metric, and the two can diverge sharply.
What the footprint does tell you is the scale of the commitments behind it: power, water, workforce, and logistics. The Gibbons Creek water rights alone authorise a draw of up to 680,000 gallons per minute and permanent consumption of up to 3.2 billion gallons a year, from a reservoir holding about 10.5 billion gallons. That kind of constraint matters more than square footage.
For a reference point on real output, TSMC shipped 15.023 million wafers in 2025, its biggest year ever. That is what a leading foundry produces across a specialised network. Judging Terafab against that number, rather than against floor area, is how the scale claim earns its keep.
The deeper arithmetic, how many fabs a 1-terawatt target would actually need, lives in the first article’s how each piece fits together section, and the full feasibility treatment of whether the output claim can be met is in read the feasibility reality check.
Why are Tesla, SpaceX, and xAI building their own chips instead of buying from TSMC?
Each backer has captive, hard-to-forecast demand: Tesla’s Optimus robots and robotaxis, SpaceX’s orbital data centres and Starlink, and xAI’s model training. That demand is currently bottlenecked by merchant-foundry allocation and packaging capacity. Building removes the allocation queue and secures supply for internal workloads. The trade-off is capital intensity and multi-year yield risk against buying proven capacity from TSMC.
The captive demand pipeline is the part most commentary skims. Tesla needs Optimus humanoid robots and the Cybercab robotaxi fleet. SpaceX wants orbital data centres and the Starlink constellation. xAI wants model-training compute. Those are internal workloads, which converts Terafab from a speculative foundry into an internal cost centre with assured volume.
The pain point is specific. In 2025, the four largest AI chip designers consumed over 90% of global CoWoS packaging capacity and HBM supply, but only about 12% of advanced logic die production. TSMC’s CoWoS capacity was fully allocated through at least 2028. So even well-funded buyers wait in a queue, and the queue sits at packaging and memory, not raw logic.
Owning capacity removes that queue. The cost is the other side of the ledger: capital intensity, yield risk, time-to-market, and opportunity cost set against simply buying proven TSMC allocation. No newcomer has built a competitive leading-edge foundry in the modern semiconductor era, which is why the build decision carries risk.
The full comparison, and a build-versus-buy frame you can reuse for your own infrastructure calls, is in the strategy article.
see the build-versus-buy comparison
How does a vertically integrated fab actually work, and why combine logic, memory, and packaging under one roof?
A vertically integrated fab controls design, logic fabrication, memory, packaging, and test under one organisation, and in Terafab’s case, one roof. The appeal is packaging adjacency for 2.5D/3D integration and faster iteration with HBM4-class memory. The cost is process incompatibility: logic and memory use different chemistries, thermal budgets, and cleanroom classes, raising cross-contamination risk that specialised fabs avoid by separating processes.
Vertical integration is not new. Intel ran as an integrated device manufacturer for decades. What is new is the scale and the single roof. Modern chipmaking is normally distributed: wafers fabricated in Taiwan, memory integrated in South Korea, packaging done in Southeast Asia. Terafab collapses that into one domestic campus, where engineers can test and revise lithography masks in the same facility, cutting the weeks-long cycle times of international logistics.
The advantages are packaging adjacency for 2.5D and 3D integration, and tighter iteration with HBM4 and HBM4E memory, which shortens the logic-to-memory path. Supply-chain control and that captive demand pull hard toward consolidation. Intel’s contribution, its 18A gate-all-around process and EMIB/Foveros packaging, is what makes the integration plausible.
The objection is concrete. Logic and memory use different process chemistries, thermal budgets, and cleanroom classes. Co-locating them concentrates cross-contamination risk that specialised fabs avoid by keeping processes apart. Intel’s IDM history shows the risk: integration can deliver control and speed, but it can also turn into lock-in when a single process falls behind.
the single-roof vertical integration bet carries the full comparison, and why leading-edge process is so hard explains the process difficulty underneath.
Is vertical integration or foundry partnership the better route for AI chip supply?
It depends on demand certainty and capital tolerance. A merchant foundry such as TSMC spreads cost across many customers and optimises yield per process, which is lower risk for most buyers. Vertical integration wins only with assured internal volume, where control and speed matter more than unit economics. For most organisations, partnership is the lower-risk default. Integration is a bet justified by captive demand.
The merchant foundry model is the incumbent for good reason. TSMC’s $265 billion Arizona program is a network of specialised fabs, each tuned for a narrow process window to maximise yield and purity, with Fab 21 as the US anchor. Specialisation wins on yield, process purity, and scale economics.
Terafab’s counter-argument is that captive demand pipeline no merchant foundry can match. That is the strongest case for integration, and it only holds at Tesla’s scale.
Weigh your demand certainty and capital tolerance against time-to-market and opportunity cost. For most buyers, foundry partnership is lower risk. For an internal-demand operator like Musk’s companies, integration is a bet on control and speed. US fab construction runs four to five times the cost of Taiwan, which makes the capital question steeper still.
read the build-versus-buy verdict
How do you evaluate whether a vertical integration bet like Terafab is realistic?
Judge realism on capital, technology access, talent, time-to-yield, and demand certainty. A 100-million-square-foot building produces nothing until tooling, process engineers, and a yield ramp are in place. Benchmark against TSMC’s Arizona program and ASML’s limited EUV tool shipments. Realism will show up in the yield curve and equipment orders.
Apply that frame to Terafab and the gap appears quickly. The $16.8 billion first phase scales toward a larger stated vision, while TSMC’s $265 billion Arizona program shows what leading-edge capacity actually costs. ASML’s EUV shipments add a supply-chain ceiling no amount of capital can bypass quickly: ASML shipped 179 scanners in 2025, and its order book was fully allocated to TSMC, Samsung, and Intel through 2027.
Bernstein’s estimate puts the 1-terawatt target in perspective: 142 to 358 fabs, and $4 to $5 trillion, before land, process development, software, and ecosystem buildout. That is the capital-intensity reality check against a $16.8 billion first phase.
The scale baseline that grounds that maths is in the first article’s the one terawatt compute ambition, and the full feasibility and signal analysis is in read the feasibility analysis.
How do you separate a credible strategic signal from a negotiating tactic?
Watch hard leading indicators rather than press-release claims: land title transfer, permits and site works, groundbreaking, cleanroom construction, ASML tool orders, process-engineer hiring, and financing draws. Square footage and headcount pledges are cheap to announce. A credible commitment shows verifiable, dated milestones that cost real money; a tactic shows publicity without binding capital.
Major semiconductor announcements arrive early for three reasons: policy positioning, supplier negotiation leverage, and talent recruitment. Getting the news out before the work is done rewards all three. So timing alone is weak evidence of commitment.
Those hard indicators cost real money and leave dated, verifiable traces. For Terafab, some early evidence exists: Tesla’s April groundbreaking on a research fab at Giga Texas North Campus, and the Grimes County tax-abatement vote. Confirmed ASML tool orders for the full project are still absent. The most likely near-term read from analysts is that Terafab functions as leverage in TSMC allocation negotiations and a recruiting platform before it becomes a guaranteed buildout.
The full leading-indicator treatment is in the reality-check article, and what Terafab signals for chip supply connects the signal to downstream consequences.
read the leading-indicator list
Why does leading-edge process technology take 5+ years to develop, and why can’t it be licensed?
Leading-edge nodes such as 2nm-class gate-all-around require pathfinding, process integration, defect engineering, and a multi-year yield ramp. That knowledge is tacit, embedded in tool recipes and metrology tuned together over time. You cannot hand it over like a patent. Tool access compounds the constraint: ASML’s EUV scanners are allocated years ahead, and no amount of capital bypasses that queue quickly.
The timeline compounds. Pathfinding, process definition, a pilot line, ramp, and yield maturity each build on the last. The 2nm-class gate-all-around transition makes it harder again, and defect density and yield dominate the schedule far more than the transistor concept.
Tooling sets a hard floor. EUV and DUV lithography cannot be bought faster than ASML ships them, and ASML is the sole EUV supplier. Its 2025 shipment cadence is the public evidence of that ceiling.
Licensing fails because a leading-edge process is integrated, tacit knowledge. It is hundreds of tightly interdependent process steps with thousands of tunable parameters, optimised for yield, performance, power, defectivity, and reliability. Only the transistor concept can be licensed. Rapidus licensed a 2nm gate-all-around design from IBM, but the integration stage must be done in a development fab and cannot be outsourced or licensed.
That is why even a fully funded announcement is years from meaningful output.
What does space-grade chip manufacturing mean, and why does it matter to SpaceX?
Space-grade chips are engineered to tolerate radiation effects, single-event upsets and total ionising dose, through hardened cells, redundancy, and heavy qualification. They run on conservative nodes, prioritise reliability over performance, and cost far more than terrestrial AI chips. SpaceX needs them for orbital data centres and spacecraft avionics, a niche merchant AI-chip capacity does not serve, giving Terafab a differentiated wedge beyond pure AI compute.
Space-grade chips are a separate product class from AI accelerators. They use radiation-hardened-by-design techniques: hardened flip-flops, error-correcting memory, memory scrubbing, and modular redundancy to tolerate single-event upsets and total ionising dose. They run on older, more conservative nodes, trade raw performance for reliability, cost far more, and ship in low volume. A single sophisticated component can run $20,000 to $100,000 or more.
SpaceX is the anchor customer because orbital data centres and spacecraft avionics need radiation-tolerant silicon that merchant AI-chip capacity does not provide. Memory is the weak point: DRAM, DDR5, and HBM are all vulnerable to radiation, which is why redundancy gets expensive fast. Roughly 80% of Terafab’s planned capacity is reportedly earmarked for a radiation-hardened chip for SpaceX constellations.
That underserved niche, which no major foundry prioritises at volume, is what gives Terafab purpose beyond pure AI compute. The space-grade wedge connects back to the vertical integration model.
What does Terafab signal about the global semiconductor supply chain?
Terafab signals a broader shift toward reshoring, derisking, and vertical integration among hyperscale and AI buyers, backed by policy-aligned capital. If you buy chips, it means little near-term relief, possible longer-term second sourcing, and continued frontier pricing pressure. The structural signal is that the largest compute buyers are no longer content to wait in the merchant-foundry allocation queue.
The signal is bigger than one project. For three decades, foundry capacity has been built in response to proven customer volume. Terafab inverts that model: capacity built on the back of captive demand before external volume exists. That is a shift in how the largest compute buyers think about supply, and it lines up with policy-aligned capital flows into domestic fabrication.
For your business, the near-term story is unchanged: allocation stays tight, advanced packaging and HBM remain oversubscribed, and frontier pricing stays firm. The longer-term possibility is a domestic second-source pathway through Intel’s packaging, but that is years away and conditional on yield.
read the full supply-chain signal
Resource Hub: Elon Musk’s Terafab and the Future of Chip Manufacturing Deep Dives
Understanding the Project
- Inside Elon Musk’s Terafab Texas Chip Factory and Its One Terawatt Ambition — Learn what the $16.8 billion first phase actually pays for, how the footprint compares with the Pentagon and Boeing’s Everett factory, and why the 1-terawatt compute target demands an implausible number of fabs.
The Strategy and the Reality Check
- Building Versus Buying AI Chips and the Single Roof Fab Bet — Learn how the single-roof model compares with TSMC’s specialised fabs, why logic and memory are hard to co-locate, and how to weigh build versus buy for critical AI compute.
- Is Terafab Realistic and Why Leading Edge Chips Cannot Be Licensed — Learn the feasibility framework, the leading indicators that separate signal from tactic, and why leading-edge process technology takes 5-plus years and cannot simply be licensed.
The Consequences
- Space Grade Chips the New Fab Rivals and Terafab’s Supply Chain Signal — Learn what space-grade chips are, why they matter to SpaceX, how Terafab compares with Intel Foundry and Rapidus, and what the project signals for the global supply chain.
Suggested reading order: ART001 (fundamentals) → ART002 (strategy) → ART003 (feasibility) → ART004 (consequences).
Frequently Asked Questions
What role is Intel playing as Terafab’s manufacturing partner?
Intel supplies the process technology — reported as its 18A and next-generation 14A nodes — plus fab-operations expertise and EMIB/Foveros advanced packaging. It is a manufacturing partnership, not a simple licence: Intel contributes the capability that makes the project plausible without Tesla or SpaceX developing a process from scratch. The full breakdown is in the Terafab overview.
Why is Terafab being built in Grimes County, Texas?
Grimes County offers land, proximity to Texas energy and industrial infrastructure, and a rural site of roughly 30,000 residents that qualifies for substantial incentives. The site also pairs with the Gibbons Creek Reservoir for water access. That choice carries a human and policy dimension, including a 100% tax abatement, that adds risk as well as benefit.
What are the JETI program and Texas Enterprise Fund grant Terafab qualified for?
JETI (Jobs, Energy, Technology, and Innovation) is the state program that applies local tax incentives to the project. The Texas Enterprise Fund adds a performance-based $30 million grant to SpaceX. Both release funds against job and investment milestones rather than unconditional cash.
Why did TSMC ship 15 million wafers in 2025, and what does that reveal about Terafab’s ambitions?
TSMC’s 15 million wafers in 2025 is the benchmark for what a leading foundry produces in a year across a specialised network. It puts Terafab’s stated output and the 1-terawatt target into perspective: matching even a fraction of that volume from a single campus would require an implausible number of fabs. The maths is worked through in the full project breakdown.
How do you model the capital intensity of a new hardware initiative before committing?
Model depreciation, utilisation, yield ramp, and the cost of being wrong, against demand certainty and time-to-market. The purpose is to test whether a “build” decision survives a downside scenario. See the framework in the build-versus-buy analysis.
What should you look for when assessing a major supplier’s capacity claims?
Look for dated, verifiable commitments that cost real money: tool orders, wafer-start commitments, named customer volume, and financing draws. Press-release scale is cheap; binding capital commitments are the credible signal. The full leading-indicator list is in the reality-check article.
Where can I find ASML’s lithography tool shipment figures for 2025?
ASML publishes quarterly and annual results, including EUV and DUV shipment counts, on its investor-relations site; 2025 figures show roughly 179 scanners shipped, a hard supply constraint for any new leading-edge fab. The reality-check analysis uses those figures to explain why tool access caps how fast anyone can move.
What does Terafab mean for regular tech companies that buy chips?
In the near term, little relief: allocation remains tight and frontier pricing stays firm. Longer term, a successful Terafab could create a second sourcing option and accelerate reshoring, but that is years away and conditional on yield. The buyer-impact analysis is in the supply-chain signal article.
So, can one building reshape the chip order?
Terafab’s clearest meaning today is supply-chain power; its production promise is still unproven. The building, the money, and the partners are real. The yield curve, the tool orders, and the ramp are still years away.
The first thing it reshapes is the expectation that the biggest compute buyers will keep queueing. Whatever happens to the square footage, that change is already priced into how Tesla, SpaceX, and xAI think about supply.
Where you start depends on what you are trying to decide:
- “I want the basics first”: Inside Elon Musk’s Terafab Texas Chip Factory and Its One Terawatt Ambition
- “I’m weighing build versus buy for AI compute”: Building Versus Buying AI Chips and the Single Roof Fab Bet
- “I want the feasibility and risk reality check”: Is Terafab Realistic and Why Leading Edge Chips Cannot Be Licensed
- “I want to know what this means for the chip supply chain”: Space Grade Chips the New Fab Rivals and Terafab’s Supply Chain Signal
