Micron Technology (NASDAQ: MU) just posted the best quarter in its history. Revenue nearly tripled year-over-year to $23.9 billion. Gross margin hit a company-record 75%. Q3 2026 guidance calls for $33.5 billion at approximately 81% margin.
And Micron still cannot fill what its customers need.
That gap is what this article is about. The results matter — not as an investment story, but because they confirm that the AI memory crunch is structural, not cyclical. And that Micron’s position as the only US-based High-Bandwidth Memory (HBM) supplier has become a genuine strategic variable in the US AI supply chain. We’re going to use Micron’s results as a lens on five questions: what the CHIPS Act actually delivers, how export controls on Samsung’s China business made the shortage worse, whether a third HBM supplier changes anything for enterprise buyers, why the US chip independence narrative has a packaging problem, and what you should expect when you’re planning AI infrastructure procurement.
What do Micron’s record quarterly numbers actually mean for the AI memory market?
- Micron’s Q2 FY2026 revenue nearly tripled year-on-year to $23.86B (from $8.05B)
- Gross margin reached 74.4% — up from 36.8% YoY — HBM’s premium pricing is now flowing directly to profitability
- Q3 FY2026 guidance of ~$33.5B at ~81% margin signals the supercycle has not peaked
- HBM is sold out for all of calendar 2026; 2027 allocations are already being set
Three numbers tell the structural story, and none of them are really about Micron.
Revenue growth (+196% YoY) is what happens when DRAM gets repriced as a strategic asset. HBM3E average selling prices run 6–8x conventional DDR5 per gigabyte. That is not a cycle. That is a structural repricing of what advanced memory is worth.
Margin expansion (74.4% gross margin vs. 36.8% a year ago): by Q4 2025, HBM made up approximately two-thirds of the total AI chip bill-of-materials cost, per Epoch AI’s AI Chip Components Explorer. When you are the primary cost driver in a sold-out market, margins look like this.
Forward guidance ($33.5B at 81% gross margin) is the most important number. Microsoft, Meta, Google, Amazon, and Oracle collectively committed $600–630 billion in 2026 capital expenditure, with roughly 75% targeting AI infrastructure. Pre-committed, multi-year allocations. That is the demand floor, and it is rising.
Why is Micron sold out but still unable to fill 50–67% of customer demand?
- Micron’s HBM is fully allocated for 2026, but it can fulfil only 50–67% of what key customers want to buy
- The constraint is production ramp speed: HBM stacking involves through-silicon vias that take years to scale
- Enterprise buyers wanting Micron as an SK Hynix alternative face a queue, not a catalogue
The 50–67% figure has not moved from the prior quarter. That consistency is the point — this is not a temporary glitch. Through-silicon via (TSV) stacking cannot be rushed past the limits of yield ramp speed, and TSV ramps typically take 18–36 months after production start.
💡 Through-silicon vias (TSVs): Vertical electrical connections that pass through a silicon wafer or die, allowing multiple DRAM chips to be stacked and connected — the fundamental technology that makes HBM’s high bandwidth possible.
The allocation hierarchy makes it worse. Nvidia has secured its position at the front of Micron’s queue. The customers facing that unfulfilled 33–50% are not Nvidia — they are the enterprise buyers sitting below the hyperscaler tier.
What is the difference between HBM3E and HBM4, and where does Micron sit?
Micron is shipping HBM3E for Nvidia’s Blackwell B300 and began volume HBM4 shipments in 2026 for Nvidia’s Vera Rubin. SK Hynix leads by approximately six months on HBM4 ramp. Market share sits at SK Hynix ~62%, Micron ~21%, Samsung ~17%, per Wing VC’s memory triopoly analysis.
For enterprise buyers, the SK Hynix and Samsung duopoly that Micron is entering is not a duopoly Micron has broken. It is a triopoly where Micron is the junior member — legitimate, growing, but constrained.
What does the CHIPS Act actually deliver for US memory supply, and when?
- The CHIPS Act provides approximately $6.1B in grants and $7.5B in loans to Micron — funding the Idaho ID1 fab and New York campus
- The Idaho ID1 fab targets first wafer output in mid-2027; the New York campus at H2 2028 at earliest
- New capacity arrives already committed to AI buyers: CHIPS Act funding does not equal near-term procurement relief
The Idaho ID1 fab opened in October 2025 and targets first wafer output in mid-2027. Micron broke ground on the New York campus in January 2026, targeting H2 2028 — though TrendForce suggests delays toward late 2030.
Capacity that comes online in 2027–2028 arrives into a market where allocations are already locked in. Intel CEO Lip-Bu Tan put it plainly: “There’s no relief until 2028.”
Here is where the milestones sit: 2022 — CHIPS Act enacted. 2026 — Micron HBM sold out; Idaho ID1 under construction. Mid-2027 — Idaho ID1 first wafer output. H2 2028 — New York campus earliest output. ~2029 — TSMC Arizona advanced packaging operational.
How did US export controls on Samsung’s China HBM sales make the shortage worse?
- In December 2024, US export controls restricted Samsung from shipping advanced HBM to Chinese AI chip buyers
- Chinese firms stockpiled approximately 7 million Samsung HBM chips in the month before restrictions came into effect
- Samsung’s redirected supply went to US AI buyers — but hyperscaler demand outpaced it, compounding the global shortfall
- Micron is a direct beneficiary: US buyers seeking supply diversity accelerated their Micron allocations
Samsung’s China volume had to go somewhere — and it went toward US and allied buyers. But the underlying US demand did not moderate. Hyperscaler capex kept accelerating and the redirected supply was absorbed immediately. The US market became more acute, not less.
CXMT (ChangXin Memory Technologies) has HBM2 in mass production and is targeting HBM3 by end 2026 — but export controls constrain its equipment access. CXMT matters as context, not as an alternative supply source for US buyers.
Does a third HBM supplier actually change pricing and allocation dynamics for enterprise buyers?
- In 2026: no. SK Hynix controls approximately 62% of HBM supply, Samsung ~17%, Micron ~21% — and Micron is constrained by ramp speed
- In 2027–2028: moderately — but allocations arrive pre-committed to hyperscalers
- For enterprise buyers, a third supplier improves options at the margin — it is not a substitute procurement strategy
The triopoly is the structural fact. A new greenfield DRAM fab costs $15–25 billion; lead time runs four to five years; yield ramp takes 18–36 months. No new entrant is plausible at any relevant planning horizon. Hyperscalers lock in multi-year agreements. Nvidia sits at the top of each supplier’s priority list. Enterprise buyers compete for whatever is left.
Pricing relief requires supply growth that outpaces demand — not just a new supplier. Samsung has signalled HBM price increases of high-teens to low-twenties percent in 2026 contracts. Micron’s scale-up may improve your procurement options in 2027–2028, but even then capacity arrives pre-committed. For a complete overview of how this structural memory market shift plays out across the full AI supply chain, our AI memory crunch series covers each dimension in one place.
Where can I find current HBM market share data?
Epoch AI’s AI Chip Components Explorer is the most accessible tool for tracking HBM’s economic weight in AI chip systems. TrendForce publishes the most cited quarterly market share figures. Wing VC’s memory triopoly analysis provides structural context. CSIS publishes geopolitical risk analysis on the US memory supply chain.
Why does Micron’s Idaho fab not solve the US memory chip independence problem?
- Even HBM manufactured in Idaho must be packaged using TSMC’s CoWoS process — and that capacity is primarily in Taiwan
- TSMC’s Arizona advanced packaging facility is not expected to be operational until approximately 2029
- The CHIPS Act addresses memory fabrication; it has not closed the packaging gap
💡 CoWoS (Chip-on-Wafer-on-Substrate): TSMC’s advanced packaging process that bonds HBM stacks to GPU logic dies on a silicon interposer. Without it, HBM cannot be integrated into AI accelerators.
Here is the part that does not get enough attention. Micron’s Idaho HBM, once fabricated, cannot simply ship to a US data centre. It requires CoWoS packaging before it can function in an AI accelerator. TSMC controls approximately 90% of advanced packaging for AI chips. No US-based alternative exists at comparable scale. The Idaho ID1 fab targets first wafer output in mid-2027, and TSMC Arizona advanced packaging is not operational until approximately 2029 — a two-year window where US-manufactured HBM still routes through Taiwan for its final step.
As covered in TSMC’s CoWoS dependency that applies equally to Micron, the same constraint applies to Intel and other US chip strategies. 2029 is the horizon for a genuinely more independent US HBM supply chain. Before that, the independence claim is roughly half-complete.
FAQ
Can I buy Micron HBM directly as an enterprise customer?
No. HBM is integrated into AI accelerators — Nvidia GPU systems — and sold through those platforms. You access Micron’s HBM indirectly by purchasing Nvidia Blackwell or Vera Rubin GPU systems from cloud providers or hardware resellers.
Does Micron’s growth mean the HBM shortage will ease in 2027?
Partially. The Idaho ID1 fab adds supply from mid-2027, but that capacity arrives already committed to existing customers. Expect 18–24 months of acute tightness ahead. Full normalisation is a 2028–2029 story at earliest.
What is the CHIPS Act and does it actually help with the memory shortage?
The CHIPS Act is US federal legislation providing approximately $52 billion in grants and loans to incentivise domestic semiconductor manufacturing. Micron receives approximately $13.6 billion. It helps with the long-term structural problem — not the near-term shortage. Think of it as building the infrastructure for the next cycle, not fixing the current one.
What is Epoch AI’s AI Chip Components Explorer and how do I use it?
It is a publicly accessible tool that breaks down the bill-of-materials cost of AI chips by component — HBM, logic die, packaging, and interconnects. It shows HBM constituted approximately two-thirds of total AI chip cost by Q4 2025. Total spending on AI chip components across the top four designers more than doubled from 2024 to 2025, rising from $22 billion to $52 billion.
How does Micron compare to SK Hynix for enterprise AI infrastructure procurement?
SK Hynix is the dominant supplier at approximately 62% market share and roughly six months ahead on HBM4 ramp. Micron holds approximately 21% and can fulfil only 50–67% of key customer demand. Qualify Micron as a secondary supplier, but do not plan procurement around it as a primary channel before 2027.
What is CXMT and why does it matter for global memory supply?
CXMT (ChangXin Memory Technologies) is a Chinese DRAM manufacturer targeting HBM3 mass production by end 2026. Export controls exclude CXMT from supplying advanced HBM outside China. It matters as context — China is building domestic memory capacity — but it is not a viable alternative for US or allied buyers.
Why is the 2026 memory shortage considered structural rather than cyclical?
The 2020–2023 shortage was an external shock that supply eventually absorbed. The 2024–2026 shortage is driven by deliberate strategy: fabs are reallocating wafer capacity to higher-margin HBM because AI demand has reset at a structurally higher level. Multi-year hyperscaler capex commitments have created sustained demand that outpaces HBM capacity build rates regardless of normal inventory cycles.
What does Micron’s HBM supply situation mean for AI infrastructure costs?
HBM constitutes approximately two-thirds of AI chip BOM cost. Samsung has signalled price increases of high-teens to low-twenties percent in 2026 contracts. Elevated HBM pricing translates directly to GPU system costs regardless of whether Nvidia list prices change. Cost relief requires supply growth to outpace demand — a 2027–2028 scenario at earliest.
How does the TSMC CoWoS packaging dependency affect Micron’s US independence claim?
CoWoS integrates HBM with GPU dies — a mandatory step in producing AI accelerators. Micron’s Idaho HBM must be packaged using CoWoS at TSMC facilities primarily in Taiwan. TSMC accounts for approximately 90% of advanced packaging for AI chips. TSMC’s Arizona advanced packaging facility is not operational until approximately 2029.
Which analyst firms track HBM market share data?
TrendForce publishes the most cited quarterly market share estimates. Counterpoint Research reported SK Hynix at 57% revenue share versus Samsung’s 22% in Q3 2025. Epoch AI’s AI Chip Components Explorer provides cost-share data. Wing VC’s memory triopoly analysis provides structural market context.
Will Micron’s New York fab change the US memory supply picture?
Micron broke ground on its $100 billion New York campus in January 2026, targeting wafer output by H2 2028 — though TrendForce suggests delays toward late 2030. Like Idaho, New York capacity arrives into a market with existing allocation commitments. In combination, the two fabs position Micron for increased US market share in the 2028–2030 window.
What happens to enterprise AI procurement if a new Nvidia platform cycle accelerates HBM demand again?
Nvidia’s Feynman GPU (planned 2028) will require HBM4+ or HBM5 at volumes current supply chains are not planning for. If it is announced before 2027–2028 supply additions are absorbed, the shortage extends. Lock in multi-year agreements where you can, and do not assume spot market availability will emerge in 2027.
Micron’s record quarter reflects a structural advantage in the AI memory cycle — but it does not resolve the supply constraints you face as an enterprise buyer. The 50–67% fulfilment constraint tells you the queue is real. The CHIPS Act timeline tells you relief is years away. The CoWoS packaging dependency tells you that even 2027 Idaho HBM still routes through Taiwan before it reaches a US data centre. The forward picture: Micron’s scale-up matters, the Idaho fab matters, and CHIPS Act investment matters — but the window for non-hyperscaler procurement options opens in 2027–2028 at best, conditional on no new demand acceleration. Plan accordingly.
